Modern DRAM chips (DDR4 and LPDDR4 after 2015) are affected by a vulnerability in deployment of internal mitigations against RowHammer attacks known as Target Row Refresh (TRR), aka the TRRespass issue. To exploit this vulnerability, the attacker needs to create certain access patterns to trigger bit flips on affected memory modules, aka a Many-sided RowHammer attack. This means that, even when chips advertised as RowHammer-free are used, attackers may still be able to conduct privilege-escalation attacks against the kernel, conduct privilege-escalation attacks against the Sudo binary, and achieve cross-tenant virtual-machine access by corrupting RSA keys. The issue affects chips produced by SK Hynix, Micron, and Samsung. NOTE: tracking DRAM supply-chain issues is not straightforward because a single product model from a single vendor may use DRAM chips from different manufacturers.
CVE-2020-10255
This critical-severity CVE scores 9.0 under NVD CVSS v3. EPSS exploit probability: 2.5%, top 17% of all CVEs by exploit prediction. GitHub Security Advisory data not yet ingested — confidence will rise once GHSA publishes (typical lag: hours to days for open-source ecosystem CVEs; never for infrastructure-only CVEs).
- High severity, but no confirmed exploitation yet
No vendor fix yet — apply a workaround or compensating control (WAF / firewall / segmentation) and watch for a patch.
- CVSS v3
- 9.0
- EG Score
- 9.0(medium)
- EG Risk
- 46(Track)EG Risk 46/100SSVC: Track
EG Risk is EchelonGraph's 0–100 priority score: it fuses intrinsic severity with real-world exploitation and automatability so you can rank equal-severity CVEs and fix the most dangerous first. Higher = act sooner. Distinct from the 0–10 EG Score (severity).
How it’s computedSeverity90% × 45%Exploitation3% × 40%Automatability30% × 15%Action: Routine — remediate on your standard cadence. - EPSS PROB
- 3%
- EPSS %ILE
- 84%
- KEV
- Not listed
Published
March 10, 2020
Last Modified
November 21, 2024
Advisory Details (6)
Auto-updated Jul 26, 2026Poor Rowhammer Fixes On DDR4 DRAM Chips Re-Enable Bit Flipping Attacks
https://thehackernews.com/2020/03/rowhammer-vulnerability-ddr4-dram.htmlVUSec on X: "Remember #Rowhammer? Old variants won't work on recent DDR4 chips. Introducing #TRRespass, a Rowhammer fuzzer that finds new Many-Sided #Rowhammer patterns to bypass in-DRAM #TRR on "Rowhammer-free" DIMMs of all vendors. Coming soon: app to test your phone https://t.co/h4X7N69Rgs" / X
https://twitter.com/vu5ec/status/1237399112590467072Weakness Classification(1)
MITRE Common Weakness Enumeration — the root-cause categories this CVE belongs to.
Data Freshness Timeline
(refreshed 7× in last 7d / 27× in last 30d)
Each row is a source pipeline that fetched or updated this CVE on that date, with what changed. For example, "NVD update" means NVD published or revised its analysis for this CVE; "MITRE cvelistV5" means we ingested or refreshed it from the CNA feed. Most recent first.
Showing the most recent 100 of 118 total refreshes for this CVE.
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Related CVEs(same CWE)
Same CWE
10 shownCWE-20
- CVE-2005-0050EG 10.0EPSS p99HIGH
- CVE-2004-1019EG 10.0EPSS p94HIGH
- CVE-2004-0840EG 10.0EPSS p98HIGH
- CVE-2003-1425EG 10.0EPSS p96HIGH
- CVE-2003-1487EG 10.0EPSS p94HIGH
- CVE-2002-1874EG 10.0HIGH
- CVE-2002-2236EG 10.0EPSS p91HIGH
- CVE-2002-2365EG 10.0HIGH
- CVE-2002-1358EG 10.0EPSS p93HIGH
- CVE-2002-1359EG 10.0EPSS p100HIGH
Frequently asked(5)
What is CVE-2020-10255?
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Dependency Blast Radius
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